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X9470
PIN CONFIGURATION
TSSOP
V sense+
RH REF
RL REF
1
2
3
24
23
22
V sense-
SHDN
INC/DEC
RW REF
AGND
VSS
CS
SCL
SDA
RH BIAS
RW BIAS
RL BIAS
4
5
6
7
8
9
10
11
12
X9470
21
20
19
18
17
16
15
14
13
V OUT
V+
V CC
V CC
V BIAS
VSS
A2
A1
A0
ORDERING INFORMATION
Part Number
X9470V24I
PIN DESCRIPTIONS
Temperature Range
-40°C TO 85°C
Package
24-Lead TSSOP
TSSOP pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
V SENSE+
RH REF
RL REF
RW REF
AGND
VSS
CS
SCL
SDA
RH BIAS
RW BIAS
RL BIAS
A0
A1
A2
VSS
V BIAS
V CC
V CC
V+
V OUT
INC/DEC
SHDN
V SENSE-
Brief Description
Positive sense voltage input terminal
Upper Terminal of Potentiometer, called the R REF potentiometer. The voltage applied to this pin will determine
the upper voltage limit of the adjustment for the Up/Down threshold of the comparator.
Lower Terminal of Potentiometer, called the R REF potentiometer. The voltage applied to this pin will determine
the lower voltage limit of the adjustment for the Up/Down threshold of the comparator.
Wiper Terminal of Potentiometer, called the R REF potentiometer. The voltage on this pin will be the threshold
for the Up/Down comparator. Also referred to as the V REF of the comparator.
Analog ground to allow single point grounding external to the package to minimize digital noise.
System (Digital) Ground Reference
Chip Select. This input enables bias calibration adjustments to the R BIAS potentiometer. CMOS input with in-
ternal pull-down.
Dual function. Function 1: The increment control input. Increments or decrements the RBIAS potentiometer.
Function 2: Serial Data Clock Input. Requires external pull-up.
Serial Data Input. Bi-directional 2-wire interface. Requires external pull-up.
Upper Terminal of Potentiometer, called the R BIAS potentiometer. The voltage applied to this pin will determine
the upper limit of the bias voltage to the PA (or V BIAS pin).
Wiper Terminal of Potentiometer, called the R BIAS potentiometer. This voltage is the equivalent to the unbuf-
fered voltage that will appear at the V BIAS pin.
Lower Terminal of Potentiometer, called the R BIAS potentiometer. The voltage applied to this pin will determine
the lower limit of the bias voltage to the PA (or V BIAS pin).
External address pin which allows for a hardware slave address selection of this device.
This pin has an internal pull-down.
External address pin which allows for a hardware slave address selection of this device.
This pin has an internal pull-down.
External address pin which allows for a hardware slave address selection of this device.
This pin has an internal pull-down.
System (Digital) Ground Reference
This is the bias output voltage pin and is used to drive the filter network to the PA gate.
System (Digital) Supply Voltage
System (Digital) Supply Voltage
Positive voltage supply for the instrumentation amplifier and other analog circuits.
Instrumentation Amplifier output that is 20x or 50x the voltage across the Rsense pins.
Status output that indicates the state of the comparator. When this pin is HIGH, the RBIAS potentiometer
will increment; when the pin is LOW, the RBIAS potentiometer will decrement. This pin is open drain and
requires external resistor pull-up.
Shutdown the output op amp. When SHDN is active (HIGH), the V BIAS pin is pulled LOW.
Negative sense voltage Input terminal
2
FN8204.0
March 8, 2005
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